Have you looked at the mame source? https://github.com/mamedev/mame/blob/master/src/mame/drivers/polepos.cpp On Sun, Apr 2, 2017 at 3:43 AM, David Shoemaker <davids@oz.net> wrote:
Looking at the memory map the schematics list a single memory map for CPU 1 & 2 (Z8002's) and another memory map for CPU 3 (Z80).
I am trying to understand just how the memory is map. Can the Z80 actually get to all the ram onboard? This would make using the Z80 pod to do memory work reasonable. Vs having to find that z8002 pod.
But the address space doesn't make a lot of sense.
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