On Feb 11, 2024, at 2:31 PM, davids@oz.net wrote:
Z80 pod and the !IORQ line. Working on a GamePlan MPU-2 board.
Address space looks like:
0x0000-0x1000 ROM
0x0004 8255 Port A
0x0005 8255 Port B
0x0006 8255 Port C
0x0007 8255 Control
0x0008 Z80 CTC Ch1
0x0009 Z80 CTC Ch2
0x000A Z80 CTC Ch3
0x000B Z80 CTC Ch4
Looking over the schematic I can see that the chip select lines for the 8255 and CTC are tied the Z80 !IORQ pin (20).
Makes sense, only interface with the two peripherals when you need too so you can overlap the address space.
But from the 9010A how do I control that I am reading / writing to those devices?
Thanks,
David
Z80 IO requests are above FFFFh. I think they are 10000 to 10003h as I recall. The Z80 pod manual covers this… John :-#)#
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_______________________________________________ Techtoolslist mailing list Techtoolslist@flippers.com https://pairlist7.pair.net/mailman/listinfo/techtoolslist FTP site is: ftp://ftp.flippers.com/TTL/TestEquipment Archive site 2005-Current: https://seven.pairlist.net/pipermail/techtoolslist/ Vectorlist Archives 1997/99 - 2016: https://www.vectorlist.org/